Experimental phase-error extraction and modelling in silicon photonic arrayed waveguide gratings

We present a detailed study of parameter sweeps of silicon photonic arrayed waveguide gratings (AWG), looking into the effects of phase errors in the delay lines, which are induced by fabrication variation. We fabricated AWGs with 8 wavelength channels spaced 200 GHz and 400 GHz apart. We swept the waveguide width of the delay lines, and also performed a sweep where we introduced increments of length to the waveguides to emulate different AWG layouts and look into the effect of the phase errors. With this more detailed study we could quantitatively confirm the results of earlier studies, showing the wider waveguides reduce the effect of phase errors and dramatically improve the performance of the AWGs in terms of insertion loss and crosstalk. We also looked into the effect of rotating the layout of the circuit on the mask, and here we could show that, contrary to results with older technologies, this no longer has an effect on the current generation of devices

Correlation between pattern density and linewidth variation in silicon photonics waveguides

We describe the correlation between the measured width of silicon waveguides fabricated with 193 nm lithography and the local pattern density of the mask layout. In the fabrication process, pattern density can affect the composition of the plasma in a dry etching process or the abrasion rate in a planarization step. Using an optical test circuit to extract waveguide width and thickness, we sampled 5841 sites over a fabricated wafer. Using this detailed sampling, we could establish the correlation between the linewidth and average pattern density around the test circuit, as a function of the radius of influence. We find that the intra-die systematic width variation correlates most with the pattern density within a radius of 200 gm, with a correlation coefficient of 0.57. No correlation between pattern density and the intra-die systematic thickness variation is observed. These findings can be used to predict photonic circuit yield or to optimize the circuit layout to minimize the effect of local pattern density. (C) 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreemen

Tolerant, broadband tunable 2 × 2 coupler circuit

We propose a circuit design for a broadband tunable 2 x 2 waveguide coupler, consisting of a two-stage Mach-Zehnder interferometer with electro-optic phase shifters in each stage. We demonstrate that such design can be configured as a tunable coupler with arbitrary coupling ratio and with a uniform response over 50-nm spectral range around 1550 nm. The design is also tolerant to fabrication variations that affect the coupling ratios of the directional couplers

Layout-aware variability analysis, yield prediction, and optimization in photonic integrated circuits

We present a simulation framework for evaluating the effect of location-dependent variability in photonic integrated circuits. The framework combines a fast circuit simulator with circuit layout information and wafer maps of waveguide width and layer thickness variations to estimate the statistics of the circuit performance through Monte Carlo simulations. We illustrate this with ring resonator filters, a design sweep of Mach-Zehnder lattice filters, and the tolerance optimization of a Mach-Zehnder interferometer, and show how variability aware design can be essential for future photonic circuit design, especially in a fabless ecosystem where details of the foundry processes are not available to the designers

Layout-aware yield prediction of photonic circuits

We demonstrate yield prediction of silicon wavelength filters using layout-aware Monte-Carlo circuit simulations. Maps of wafer and die-level variability of width and thickness are projected onto circuit layout and translated into circuit model parameters. We apply this onto Mach-Zehnder lattice filters with different filter orders

Compact silicon photonics circuit to extract multiple parameters for process control monitoring

We present a compact interferometer circuit to extract multiple model parameters of on-chip waveguides and directional couplers from optical measurements. The compact design greatly improves the accuracy of extraction with fewer measurements, making it useful for process monitoring and detailed wafer-level variability analysis. We discuss the design requirements and illustrate the extraction using the Restart-CMA-ES global optimization algorithm. (C) 2020 Optical Society of America under the terms of the OSA Open Access Publishing Agreemen